C8051F960-B-GM Datasheet, PDF (346/492 Pages) Silicon Laboratories – Ultra Low Power 128K, LCD MCU Family

C8051F96x
26.6. Blinking LCD Segments
The LCD driver supports blinking LCD applications such as clock applications where the “:” separator tog-
gles on and off once per second. If the LCD is only displaying the hours and minutes, then the device only
needs to wake up once per minute to update the display. The once per second blinking is automatically
handled by the C8051F96x.
The LCD0BLINK register can be used to enable blinking on any LCD segment connected to the LCD0 or
LCD1 segment pin. In static mode, a maximum of 2 segments can blink. In 2-mux mode, a maximum of 4
segments can blink; in 3-mux mode, a maximum of 6 segments can blink; and in 4-mux mode, a maximum
of 8 segments can blink. The LCD0BLINK mask register targets the same LCD segments as the LCD0D0
register. If an LCD0BLINK bit corresponding to an LCD segment is set to 1, then that segment will toggle at
the frequency set by the LCD0TOGR register without any software intervention.
SFR Definition 26.10. LCD0BLINK: LCD0 Blink Mask
Bit
7
6
5
4
3
2
1
0
Name
LCD0BLINK[7:0]
Type ^R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
SFR Page = 0x2; SFR Address = 0x9E
Bit
Name
Function
7:0 LCD0BLINK[7:0] _{LCD0 Blink Mask.}
Each bit maps to a specific LCD segment connected to the LCD0 and LCD1
segment pins. A value of 1 indicates that the segment is blinking. A value of 0
indicates that the segment is not blinking. This bit to segment mapping is the
same as the LCD0D0 register.
346
Rev. 1.0