C8051F960-B-GM Datasheet, PDF (231/492 Pages) Silicon Laboratories – Ultra Low Power 128K, LCD MCU Family

C8051F96x
Table 16.3. Special Function Registers (Continued)
SFRs are listed in alphabetical order. All undefined SFR locations are reserved
Register
Address SFR Page
Description
TL0
0x8A
0x0 _{Timer/Counter 0 Low}
TL1
0x8B
0x0 Timer/Counter 1 Low
TMOD
0x89
0x0 _{Timer/Counter Mode}
TMR2CN
0xC8 All Pages _{Timer/Counter 2 Control}
TMR2H
0xCD
0x0 Timer/Counter 2 High
TMR2L
0xCC
0x0 _{Timer/Counter 2 Low}
TMR2RLH
0xCB
0x0 _{Timer/Counter 2 Reload High}
TMR2RLL
0xCA
0x0 Timer/Counter 2 Reload Low
TMR3CN
0x91
0x0 _{Timer/Counter 3 Control}
TMR3H
0x95
0x0 _{Timer/Counter 3 High}
TMR3L
0x94
0x0 Timer/Counter 3 Low
TMR3RLH
0x93
0x0 _{Timer/Counter 3 Reload High}
TMR3RLL
0x92
0x0 _{Timer/Counter 3 Reload Low}
TOFFH
0xBB
0xF Temperature Offset High
TOFFL
0xBD
0xF _{Temperature Offset Low}
VDM0CN
0xFF All Pages _{VDD Monitor Control}
XBR0
0xE1
0x0 and Port I/O Crossbar Control 0
0xF
XBR1
0xE2
0x0 and Port I/O Crossbar Control 1
0xF
XBR2
0xE3
0x0 and Port I/O Crossbar Control 2
0xF
Page
452
452
451
457
459
459
458
458
463
465
465
464
464
99
99
282
358
359
360
Rev. 1.0
231