C8051F960-B-GM Datasheet, PDF (37/492 Pages) Silicon Laboratories – Ultra Low Power 128K, LCD MCU Family

C8051F96x
Name
P0.6
Table 3.1. Pin Definitions for the C8051F96x (Continued)
Pin Numbers
DQFN76 TQFP80 QFN40
A38
76
38
Type Description
D I/O or Port 0.6. See Port I/O Section for a complete
A In description.
CNVSTR
P0.7
IREF0
A37
74
P1.0
A36
72
D In
External Convert Start Input for ADC0. See
ADC0 section for a complete description.
37 D I/O or Port 0.7. See Port I/O Section for a complete
A In description.
A Out
IREF0 Output. See IREF Section for complete
description.
36 D I/O or Port 1.0. See Port I/O Section for a complete
A In description.
PC0
P1.1
A35
70
D I/O ^{Pulse Counter 0.}
35 D I/O or Port 1.1. See Port I/O Section for a complete
A In ^description.
PC1
P1.2
A34
67
D I/O ^{Pulse Counter 1.}
34 D I/O or Port 1.2. See Port I/O Section for a complete
A In ^description.
XTAL3
P1.3
A33
65
A In SmaRTClock Oscillator Crystal Input.
33 D I/O or Port 1.3. See Port I/O Section for a complete
A In description.
XTAL4
P1.4
P1.5
P1.6
P1.7
P2.0
A31
60
A30
57
A29
56
A28
54
A27
53
A Out ^{SmaRTClock Oscillator Crystal Output.}
31 D I/O or Port 1.4. See Port I/O Section for a complete
A In ^description.
30 D I/O or Port 1.5. See Port I/O Section for a complete
A In ^{description. VIORF supply.}
29 D I/O or Port 1.6. See Port I/O Section for a complete
A In ^{description. VIORF supply. May also be used as}
INT0 or INT1.
28 D I/O or Port 1.7. See Port I/O Section for a complete
A In description. VIORF supply. May also be used as
INT0 or INT1.
27 D I/O or Port 2.0. See Port I/O Section for a complete
A In ^{description. VIORF supply. May also be used as}
SCK for SPI1.
Rev. 1.0
37