C8051F960-B-GM Datasheet, PDF (347/492 Pages) Silicon Laboratories – Ultra Low Power 128K, LCD MCU Family

C8051F96x
SFR Definition 26.11. LCD0TOGR: LCD0 Toggle Rate
Bit
7
6
5
4
3
2
1
0
Name
TOGR[3:0]
Type
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
SFR Page = 0x2; SFR Address = 0x9F
Bit
Name
Function
7:4
Unused Read = 0000. Write = Don’t Care.
3:0 TOGR[3:0] _{LCD Toggle Rate Divider.}
Sets the LCD Toggle Rate according to the following equation:
LCD Toggle Rate = ^{R-----e--f--r--e---s--h-----R----a--t--e----}-----m-----u---x---_---m----o---d---e-----^----2--
Toggle Rate Divider
0000: Reserved.
0001: Reserved.
0010: Toggle Rate Divider is set to divide by 2.
0011: Toggle Rate Divider is set to divide by 4.
0100: Toggle Rate Divider is set to divide by 8.
0101: Toggle Rate Divider is set to divide by 16.
0110: Toggle Rate Divider is set to divide by 32.
0111: Toggle Rate Divider is set to divide by 64.
1000: Toggle Rate Divider is set to divide by 128.
1001: Toggle Rate Divider is set to divide by 256.
1010: Toggle Rate Divider is set to divide by 512.
1011: Toggle Rate Divider is set to divide by 1024.
1100: Toggle Rate Divider is set to divide by 2048.
1101: Toggle Rate Divider is set to divide by 4096.
All other values reserved.
Rev. 1.0
347