C8051F960-B-GM Datasheet, PDF (57/492 Pages) Silicon Laboratories – Ultra Low Power 128K, LCD MCU Family

C8051F96x
4.2. Electrical Characteristics
Table 4.2. Global Electrical Characteristics
–40 to +85 °C, 25 MHz system clock unless otherwise specified.
Parameter
Supply Voltage (V_BAT)
Minimum RAM Data 
Retention Voltage¹
Condition
Not in sleep mode
in sleep mode
SYSCLK (System Clock)²
T_SYSH (SYSCLK High Time)
T_SYSL (SYSCLK Low Time)
Specified Operating 
Temperature Range
Notes:
1. Based on device characterization data; Not production tested.
2. SYSCLK must be at least 32 kHz to enable debugging.
Min Typ Max
1.8
3.8
— 1.4 —
— 0.3 0.5
0 — 25
18 — —
18 — —
–40 — +85
Unit
V
V
MHz
ns
ns
°C
Table 4.3. Digital Supply Current at VBAT pin with DC-DC Converter Enabled
–40 to +85 °C, VBAT = 3.6V, VDC = 1.9 V, 24.5 MHz system clock unless otherwise specified.
Parameter
Condition
Min Typ Max Unit
Digital Supply Current—CPU Active (Normal Mode, fetching instructions from flash, no external
load)
I_BAT ^1,2,3
V_BAT= 3.0 V
V_BAT= 3.3 V
— 4.1 —
mA
— 4.0 —
mA
V_BAT= 3.6 V
— 3.8 —
mA
Digital Supply Current—CPU Inactive (Sleep Mode, sourcing current to external device)
I_BAT1
sourcing 9 mA to external device
sourcing 19 mA to external device
— 6.5 —
mA
— 13 —
mA
Notes:
1. Based on device characterization data; Not production tested.
2. Digital Supply Current depends upon the particular code being executed. The values in this table are obtained
with the CPU executing a mix of instructions in two loops: djnz R1, $, followed by a loop that accesses an
SFR, and moves data around using the CPU (between accumulator and b-register). The supply current will
vary slightly based on the physical location of this code in flash. As described in the Flash Memory chapter, it
is best to align the jump addresses with a flash word address (byte location /4), to minimize flash accesses
and power consumption.
3. Includes oscillator and regulator supply current.
Rev. 1.0
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