C8051F960-B-GM Datasheet, PDF (153/492 Pages) Silicon Laboratories – Ultra Low Power 128K, LCD MCU Family

C8051F96x
SFR Definition 11.4. DMA0BUSY: DMA0 Busy
Bit
Name
Type
Reset
7
6
5
4
3
2
1
0
CH6_BUSY CH5_BUSY CH4_BUSY CH3_BUSY CH2_BUSY CH1_BUSY CH0_BUSY
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
SFR Page = 0x2; SFR Address = 0xD5
Bit Name
Description
7 Unused
6 CH6_BUSY Channel 6 Busy.
5 CH5_BUSY Channel 5 Busy.
4 CH4_BUSY Channel 4 Busy.
3 CH3_BUSY Channel 3 Busy.
2 CH2_BUSY Channel 2 Busy.
1 CH1_BUSY Channel 1 Busy.
0 CH0_BUSY Channel 0 Busy.
Write
Read
No effect.
Always Reads 0.
0: No effect.
0: DMA0 channel 6 Idle.
1: Force DMA0 transfer to 1: DMA0 transfer in prog-
start on channel 6.
ress on channel 6.
0: No effect.
0: DMA0 channel 5 Idle.
1: Force DMA0 transfer to 1: DMA0 transfer in prog-
start on channel 5.
ress on channel 5.
0: No effect.
0: DMA0 channel 4 Idle.
1: Force DMA0 transfer to 1: DMA0 transfer in prog-
start on channel 4.
ress on channel 4.
0: No effect.
0: DMA0 channel 3 Idle.
1: Force DMA0 transfer to 1: DMA0 transfer in prog-
start on channel 3.
ress on channel 3.
0: No effect.
0: DMA0 channel 2 Idle.
1: Force DMA0 transfer to 1: DMA0 transfer in prog-
start on channel 2.
ress on channel 2.
0: No effect.
0: DMA0 channel 1 Idle.
1: Force DMA0 transfer to 1: DMA0 transfer in prog-
start on channel 1.
ress on channel 1.
0: No effect.
0: DMA0 channel 0 Idle.
1: Force DMA0 transfer to 1: DMA0 transfer in prog-
start on channel 0.
ress on channel 0.
Rev. 1.0
153