C8051F960-B-GM Datasheet, PDF (228/492 Pages) Silicon Laboratories – Ultra Low Power 128K, LCD MCU Family

C8051F96x
Table 16.3. Special Function Registers (Continued)
SFRs are listed in alphabetical order. All undefined SFR locations are reserved
Register
Address SFR Page
Description
P2
0xA0 All Pages _{Port 2 Latch}
P3DRV
0xA1
0xF Port 3 Drive Strength
P3MDIN
0xF1
0xF _{Port 3 Input Mode Configuration}
P3MDOUT
0xB1
0xF _{P3 Mode Out}
P3
0xB0 All Pages Port 3
P4DRV
0xA2
0xF _{Port 4 Drive Strength}
P4MDIN
0xF2
0xF _{Port 4 Input Mode Configuration}
P4MDOUT
0xF9
0xF P4 Mode Out
P4
0xD9
0xF _{Port 4 Latch}
P5DRV
0xA3
0xF _{Port 5 Drive Strength}
P5MDIN
0xF3
0xF Port 5 Input Mode Configuration
P5MDOUT
0xFA
0xF _{P5 Mode Out}
P5
0xDA
0xF _{Port 5 Latch}
P6DRV
0xAA
0xF Port 6 Drive Strength
P6MDIN
0xF4
0xF _{Port 6 Input Mode Configuration}
P6MDOUT
0xFB
0xF _{P6 Mode Out}
P6
0xDB
0xF Port 6 Latch
P7DRV
0xAB
0xF _{Port 7 Drive Strength}
P7MDOUT
0xFC
0xF _{P7 Mode Out}
P7
0xDC
0xF Port 7 Latch
PC0CMP0H
0xE3
0x2 _{PC0 Comparator 0 High}
PC0CMP0L
0xE1
0x2 PC0 Comparator 0 Low
PC0CMP0M
0xE2
0x2 _{PC0 Comparator 0 Middle}
PC0CMP1H
0xF3
0x2 _{PC0 Comparator 1 High}
PC0CMP1L
0xF1
0x2 PC0 Comparator 1 Low
PC0CMP1M
0xF2
0x2 _{PC0 Comparator 1 Middle}
PC0CTR0H
0xDC
0x2 _{PC0 Counter 0 High}
PC0CTR0L
0xDA
0x2 PC0 Counter 0 Low
PC0CTR0M
0xD8
0x2 _{PC0 Counter 0 Middle}
PC0CTR1H
0xDF
0x2 _{PC0 Counter 1 High}
PC0CTR1L
0xDD
0x2 PC0 Counter 1 Low
PC0DCH
0xFA
0x2 _{PC0 Debounce Configuration High}
PC0DCL
0xF9
0x2 _{PC0 Debounce Configuration Low}
PC0HIST
0xF4
0x2 PC0 History
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Rev. 1.0
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