C8051F960-B-GM Datasheet, PDF (198/492 Pages) Silicon Laboratories – Ultra Low Power 128K, LCD MCU Family

C8051F96x
14.6.5. Counter Mode
The Counter (CTR) Mode uses a sequential counter which is incremented after each block. This turns the
block cipher into a stream cipher. This algorithm is shown inFigure 14.4. Note that the decryption operation
actually uses the encryption key and encryption block cipher. The XOR operation is always on the output
of the Cipher. The counter is a 16-byte block. Often the several bytes of the counter are initialized to a
nonce (number used once). The last byte of the counter is incremented and propagated. Thus, the counter
is treated as a 16-byte big endian integer.
Encryption
Counter
(0x00...00)
Counter
(0x00...01)
Encryption Key
Encryption
Cipher
Encryption Key
Encryption
Cipher
Plaintext
XOR
Plaintext
XOR
Ciphertext
Ciphertext
Decryption
Encryption
Key
Ciphertext
Counter
(0x00...00)
Encryption
Cipher
XOR
Encryption
Key
Ciphertext
Counter
(0x00...01)
Encryption
Cipher
XOR
Plaintext
Figure 14.7. Counter Mode
Plaintext
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