C8051F960-B-GM Datasheet, PDF (299/492 Pages) Silicon Laboratories – Ultra Low Power 128K, LCD MCU Family

C8051F96x
SFR Definition 24.3. RTC0DAT: SmaRTClock Data
Bit
7
6
5
4
3
2
1
0
Name
RTC0DAT[7:0]
Type
R/W
Reset
0
0
0
0
0
0
0
0
SFR Page= 0x0; SFR Address = 0xAD
Bit Name
Function
7:0 RTC0DAT SmaRTClock Data Bits.
Holds data transferred to/from the internal SmaRTClock register selected by
RTC0ADR.
Note: Read-modify-write instructions (orl, anl, etc.) should not be used on this register.
Rev. 1.0
299