C8051F960-B-GM Datasheet, PDF (22/492 Pages) Silicon Laboratories – Ultra Low Power 128K, LCD MCU Family

C8051F96x
1. System Overview
C8051F96x devices are fully integrated mixed-signal system-on-a-chip MCUs. Highlighted features are
listed below. Refer to Table 2.1 for specific product feature selection and part ordering numbers.
 Power efficient on-chip dc-dc buck converter
 High-speed pipelined 8051-compatible microcontroller core (up to 25 MIPS)
 In-system, full-speed, non-intrusive debug interface (on-chip)
 True 10-bit 300 ksps, or 12-bit 75 ksps single-ended ADC with 16 external analog inputs and 4 internal
inputs such as various power supply voltages and the temperature sensor
 6-bit programmable current reference
 Precision programmable 24.5 MHz internal oscillator with spread spectrum technology
 128, 64, 32, or 16 kB of on-chip flash memory
 8448 or 4352 bytes of on-chip RAM
 Up to 128 segment LCD driver
 SMBus/I²C, enhanced UART, and two enhanced SPI serial interfaces implemented in hardware
 Four general-purpose 16-bit timers
 Programmable counter/timer array (PCA) with six capture/compare modules and watchdog timer
function
 Hardware AES, DMA, and pulse counter
 On-chip power-on reset, V_DD monitor, and temperature sensor
 Two on-chip voltage comparators
 57 or 34 Port I/O
With on-chip power-on reset, V_DD monitor, watchdog timer, and clock oscillator, the C8051F96x devices
are truly standalone system-on-a-chip solutions. The flash memory can be reprogrammed even in-circuit,
providing non-volatile data storage, and also allowing field upgrades of the 8051 firmware. User software
has complete control of all peripherals, and may individually shut down any or all peripherals for power
savings.
The on-chip Silicon Labs 2-Wire (C2) Development Interface allows non-intrusive (uses no on-chip
resources), full speed, in-circuit debugging using the production MCU installed in the final application. This
debug logic supports inspection and modification of memory and registers, setting breakpoints, single
stepping, run and halt commands. All analog and digital peripherals are fully functional while debugging
using C2. The two C2 interface pins can be shared with user functions, allowing in-system debugging with-
out occupying package pins.
Each device is specified for 1.8 to 3.8 V operation over the industrial temperature range (–40 to +85 °C).
The Port I/O and RST pins are tolerant of input signals up to VIO + 2.0 V. The C8051F960/2/4/6/8 are
available in a 76-pin DQFN package and an 80-pin TQFP package. The C8051F961/3/5/7/9 are available
in a 40-pin QFN package. All package options are lead-free and RoHS compliant. See Table 2.1 for order-
ing information. Block diagrams are included in Figure 1.1 through Figure 1.16.
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Rev. 1.0