C8051F960-B-GM Datasheet, PDF (349/492 Pages) Silicon Laboratories – Ultra Low Power 128K, LCD MCU Family

C8051F96x
SFR Definition 26.14. LCD0CHPCF: LCD0 Charge Pump Configuration
Bit
7
6
5
4
3
2
1
0
Name
Type ^R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
1
1
0
0
0
0
0
SFR Page = 0x2; SFR Address = 0xAD
Bit
Name
7:0 Reserved Must write 0x60.
Function
SFR Definition 26.15. LCD0CHPMD: LCD0 Charge Pump Mode
Bit
7
6
5
4
3
2
1
0
Name
Type ^R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
1
1
1
0
1
0
0
1
SFR Page = 0x2; SFR Address = 0xAE
Bit
Name
7:0 Reserved Must write 0xE9.
Function
SFR Definition 26.16. LCD0BUFCN: LCD0 Buffer Control
Bit
7
6
5
4
3
2
1
0
Name
Type ^R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
1
0
0
0
1
0
0
SFR Page = 0xF; SFR Address = 0x9C
Bit
Name
7:0 Reserved Must write 0x44.
Function
Rev. 1.0
349