C8051F960-B-GM Datasheet, PDF (49/492 Pages) Silicon Laboratories – Ultra Low Power 128K, LCD MCU Family

C8051F96x
C1
v
h
e
Detail A
28X
Detail A
Figure 3.6. Recomended Inner Via Placement
Table 3.4. Recomended Inner Via Placement Dimensions
Dimension
Min
Nominal
Max
C1
—
3.8
—
C2
—
3.8
—
v
—
0.35
—
h
—
0.150
—
Notes:
1. All dimensions shown are in millimeters (mm) unless otherwise noted.
2. Via hole should be 0.150 mm (6 mil) laser drilled.
Rev. 1.0
49