C8051F960-B-GM Datasheet, PDF (61/492 Pages) Silicon Laboratories – Ultra Low Power 128K, LCD MCU Family

C8051F96x
Table 4.4. Digital Supply Current with DC-DC Converter Disabled (Continued)
–40 to +85 °C, 25 MHz system clock unless otherwise specified.
Parameter
Condition
Min Typ Max Unit
Digital Supply Current—Sleep Mode (LCD Enabled, RTC enabled)
Digital Supply Current 
(Sleep Mode, SmaRTClock
running, internal LFO, LCD
Contrast Mode 1, charge
pump disabled, 60 Hz
refresh rate, driving 32 seg-
ment pins w/ no load)
1.8 V, T = 25 °C, static LCD
3.0 V, T = 25 °C, static LCD
3.6 V, T = 25 °C, static LCD
1.8 V, T = 25 °C, 2-Mux LCD
3.0 V, T = 25 °C, 2-Mux LCD
3.6 V, T = 25 °C, 2-Mux LCD
1.8 V, T = 25 °C, 4-Mux LCD
3.0 V, T = 25 °C, 4-Mux LCD
3.6 V, T = 25 °C, 4-Mux LCD
— 0.4 —
µA
— 0.6 —
— 0.8 —
— 0.7 —
µA
— 1.0 —
— 1.2 —
— 0.7 —
µA
— 1.1 —
— 1.2 —
Digital Supply Current 
(Sleep Mode, SmaRTClock
running, 32.768 kHz Crys-
tal, LCD Contrast Mode 1,
charge pump disabled,
60 Hz refresh rate, driving
32 segment pins w/ no load)
1.8 V, T = 25 °C, static LCD
3.0 V, T = 25 °C, static LCD
3.6 V, T = 25 °C, static LCD
1.8 V, T = 25 °C, 2-Mux LCD
3.0 V, T = 25 °C, 2-Mux LCD
3.6 V, T = 25 °C, 2-Mux LCD
1.8 V, T = 25 °C, 4-Mux LCD
3.0 V, T = 25 °C, 4-Mux LCD
3.6 V, T = 25 °C, 4-Mux LCD
— 0.8 —
µA
— 1.1 —
— 1.4 —
— 1.1 —
µA
— 1.5 —
— 1.8 —
— 1.2 —
µA
— 1.6 —
— 1.9 —
Digital Supply Current 
(Sleep Mode, SmaRTClock
running, internal LFO, LCD
Contrast Mode 3 (2.7 V),
charge pump enabled,
60 Hz refresh rate, driving
32 segment pins w/ no load)
1.8 V, T = 25 °C, static LCD
1.8 V, T = 25 °C, 2-Mux LCD
1.8 V, T = 25 °C, 3-Mux LCD
1.8 V, T = 25 °C, 4-Mux LCD
— 1.2 —
µA
— 1.6 —
— 1.8 —
— 2.0 —
Notes:
1. Active Current measure using typical code loop - Digital Supply Current depends upon the particular code
being executed. Digital Supply Current depends on the particular code being executed. The values in this
table are obtained with the CPU executing a mix of instructions in two loops: djnz R1, $, followed by a loop
that accesses an SFR, and moves data around using the CPU (between accumulator and b-register). The
supply current will vary slightly based on the physical location of this code in flash. As described in the Flash
Memory chapter, it is best to align the jump addresses with a flash word address (byte location /4), to
minimize flash accesses and power consumption.
2. Includes oscillator and regulator supply current.
3. Based on device characterization data; Not production tested.
4. Measured with one-shot enabled.
5. Low-Power Idle mode current measured with CLKMODE = 0x04, PCON = 0x01, and PCLKEN = 0x0F.
6. Using SmaRTClock osillator with external 32.768 kHz CMOS clock. Does not include crystal bias current.
7. Low-Power Idle mode current measured with CLKMODE = 0x04, PCON = 0x01, and PCLKEN = 0x00.
Rev. 1.0
61