C8051F960-B-GM Datasheet, PDF (181/492 Pages) Silicon Laboratories – Ultra Low Power 128K, LCD MCU Family

C8051F96x
The key and data to be encrypted should be stored as an array with the first byte to be encrypted at the
lowest address. The value of the big endian bit of the DMACF0 sfr does not matter. The AES block uses
only one byte transfers, so there is no particular endianness associated with a one byte transfer.
The dummy data can be zeros or any value. The encrypted data is discarded, so the value of the dummy
data does not mater.
It is not strictly required to use DMA channels 0, 1, and 2. Any three DMA channels may be used. The
internal state machine of the AES module will send the peripheral requests in the required order.
If the other DMA channels are going to be used concurrently with encryption, then only the bits corre-
sponding to the encryption channels should be manipulated in DM0AEN and DMA0NT sfrs.
14.2.2. Key Inversion using SFRs
Normally, the AES block is used with the DMA. This provides the best performance and lowest power con-
sumption. However, it is also possible to use the DMA with direct SFR access. The steps are documented
in the datasheet for completeness.
Steps to generate the Decryption Key from Encryption Key using SFR.
 First configure the AES block for Key inversion:
Reset AES module by writing 0x00 to AES0BCFG.
Configure the AES Module data flow for inverse key generation by writing 0x04 to the AES0DCFG sfr.
Write key size to bits 1 and 0 of the AES0BCFG.
Configure the AES core for encryption by setting bit 2 of AES0BCFG.
Enable the AES core by setting bit 3 of AES0BCFG.
 Write the dummy data alternating with Key data:
Write the first dummy byte to AES0BIN
Write the first key byte to AES0KIN
Repeat until all dummy data bytes are written
 If using 192-bit and 256-bit key, write remaining key bytes to AES0KIN:
 Wait on AES done interrupt or poll bit 5 of AES0BCFG
 Read first byte of the decryption key from the AES0YOUT sfr
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