C8051F960-B-GM Datasheet, PDF (490/492 Pages) Silicon Laboratories – Ultra Low Power 128K, LCD MCU Family

C8051F96x
DOCUMENT CHANGE LIST
Revision 0.1 to Revision 0.2
 Added new content to DC0 chapter.
 Reordered chapters.
 Corrections to SFR tables.
 Updated Electrical Specifications.
Revision 0.2 to Revision 0.3
 Added new content to DMA0, CRC1, ENC0, SPI1, and Pulse Counter chapters.
 Added TQFP-80 package variant.
 Added package drawings and landing diagram for TQFP-80 package.
 Added via placement recommendations for DQFN-76 package.
 Updated electrical specifications.
 Corrections to SFR tables.
 Fixed inconsistencies in SFR names.
 Fixed inconsistencies in acronyms and terminology.
Revision 0.3 to Revision 0.5
 Updated maximum IBAT current using precision oscillator in Table 4.4.
 Updated sleep currents in Table 4.4.
 Added Note 1 to Table 4.6.
 Deleted SFR Page Stack Example in Special Function Registers chapter.
 Change description of SFRPGEN bit in SFRPGCN SFR definition.
 Added paragraph to Flash chapter to explain lock byte behavior on 128 kB devices.
 Corrected SFRPAGE in SPI1 SFR definitions 32.1/2/3.
Revision 0.5 to Revision 1.0
 Changed revision in ordering information from A to B.
 Fixed inconsistencies in VIORF pin definitions.
 Added note about IFBANK usage.
 Updated Table 4.4 Digital Supply Current—Sleep Mode (LCD disabled, RTC disabled) 3.6 V, 25 °C
maximum to 0.23 µA.
 Fixed inconsistencies in description of reset behavior.
 Added encryption/decryption times to SFR Definition 14.1.
 Fixed inconsistencies in SFR Definition 14.2.
 Fixed inconsistencies in Port P2 through P7 SFR Definitions.
 All TBD specifications have been determined.
490
Rev. 1.0