English
Language : 

C8051F960-B-GM Datasheet, PDF (20/492 Pages) Silicon Laboratories – Ultra Low Power 128K, LCD MCU Family
C8051F96x
SFR Definition 27.24. P3MDIN: Port3 Input Mode ...................................................... 372
SFR Definition 27.25. P3MDOUT: Port3 Output Mode ............................................... 372
SFR Definition 27.26. P3DRV: Port3 Drive Strength .................................................. 373
SFR Definition 27.27. P4: Port4 .................................................................................. 373
SFR Definition 27.28. P4MDIN: Port4 Input Mode ...................................................... 374
SFR Definition 27.29. P4MDOUT: Port4 Output Mode ............................................... 374
SFR Definition 27.30. P4DRV: Port4 Drive Strength .................................................. 375
SFR Definition 27.31. P5: Port5 .................................................................................. 375
SFR Definition 27.32. P5MDIN: Port5 Input Mode ...................................................... 376
SFR Definition 27.33. P5MDOUT: Port5 Output Mode ............................................... 376
SFR Definition 27.34. P5DRV: Port5 Drive Strength .................................................. 377
SFR Definition 27.35. P6: Port6 .................................................................................. 377
SFR Definition 27.36. P6MDIN: Port6 Input Mode ...................................................... 378
SFR Definition 27.37. P6MDOUT: Port6 Output Mode ............................................... 378
SFR Definition 27.38. P6DRV: Port6 Drive Strength .................................................. 379
SFR Definition 27.39. P7: Port7 .................................................................................. 379
SFR Definition 27.40. P7MDOUT: Port7 Output Mode ............................................... 380
SFR Definition 27.41. P7DRV: Port7 Drive Strength .................................................. 380
SFR Definition 28.1. SMB0CF: SMBus Clock/Configuration ...................................... 387
SFR Definition 28.2. SMB0CN: SMBus Control .......................................................... 389
SFR Definition 28.3. SMB0ADR: SMBus Slave Address ............................................ 391
SFR Definition 28.4. SMB0ADM: SMBus Slave Address Mask .................................. 392
SFR Definition 28.5. SMB0DAT: SMBus Data ............................................................ 393
SFR Definition 29.1. SCON0: Serial Port 0 Control .................................................... 407
SFR Definition 29.2. SBUF0: Serial (UART0) Port Data Buffer .................................. 408
SFR Definition 30.1. SPI0CFG: SPI0 Configuration ................................................... 418
SFR Definition 30.2. SPI0CN: SPI0 Control ............................................................... 419
SFR Definition 30.3. SPI0CKR: SPI0 Clock Rate ....................................................... 420
SFR Definition 30.4. SPI0DAT: SPI0 Data ................................................................. 420
SFR Definition 31.1. SPI1CFG: SPI1 Configuration ................................................... 438
SFR Definition 31.2. SPI1CN: SPI1 Control ............................................................... 439
SFR Definition 31.3. SPI1CKR: SPI1 Clock Rate ....................................................... 440
SFR Definition 31.4. SPI1DAT: SPI1 Data ................................................................. 440
SFR Definition 32.1. CKCON: Clock Control .............................................................. 445
SFR Definition 32.2. TCON: Timer Control ................................................................. 450
SFR Definition 32.3. TMOD: Timer Mode ................................................................... 451
SFR Definition 32.4. TL0: Timer 0 Low Byte ............................................................... 452
SFR Definition 32.5. TL1: Timer 1 Low Byte ............................................................... 452
SFR Definition 32.6. TH0: Timer 0 High Byte ............................................................. 453
SFR Definition 32.7. TH1: Timer 1 High Byte ............................................................. 453
SFR Definition 32.8. TMR2CN: Timer 2 Control ......................................................... 457
SFR Definition 32.9. TMR2RLL: Timer 2 Reload Register Low Byte .......................... 458
SFR Definition 32.10. TMR2RLH: Timer 2 Reload Register High Byte ...................... 458
SFR Definition 32.11. TMR2L: Timer 2 Low Byte ....................................................... 459
SFR Definition 32.12. TMR2H Timer 2 High Byte ....................................................... 459
20
Rev. 1.0