C8051F960-B-GM Datasheet, PDF (466/492 Pages) Silicon Laboratories – Ultra Low Power 128K, LCD MCU Family

C8051F96x
33. Programmable Counter Array
The Programmable Counter Array (PCA0) provides enhanced timer functionality while requiring less CPU
intervention than the standard 8051 counter/timers. The PCA consists of a dedicated 16-bit counter/timer
and six 16-bit capture/compare modules. Each capture/compare module has its own associated I/O line
(CEXn) which is routed through the Crossbar to Port I/O when enabled. The counter/timer is driven by a
programmable timebase that can select between seven sources: system clock, system clock divided by
four, system clock divided by twelve, the external oscillator clock source divided by 8, SmaRTClock divided
by 8, Timer 0 overflows, or an external clock signal on the ECI input pin. Each capture/compare module
may be configured to operate independently in one of six modes: Edge-Triggered Capture, Software Timer,
High-Speed Output, Frequency Output, 8 to 11-Bit PWM, or 16-Bit PWM (each mode is described in Sec-
tion “33.3. Capture/Compare Modules” on page 469). The external oscillator clock option is ideal for real-
time clock (RTC) functionality, allowing the PCA to be clocked by a precision external oscillator while the
internal oscillator drives the system clock. The PCA is configured and controlled through the system con-
troller's Special Function Registers. The PCA block diagram is shown in Figure 33.1
Important Note: The PCA Module 5 may be used as a watchdog timer (WDT), and is enabled in this mode
following a system reset. Access to certain PCA registers is restricted while WDT mode is enabled.
See Section 33.4 for details.
SYSCLK/12
SYSCLK/4
Timer 0 Overflow
ECI
SYSCLK
External Clock/8
SmaRTClock/8
PCA
CLOCK
MUX
16-Bit Counter/Timer
Capture/Compare
Module 0
Capture/Compare
Module 1
Capture/Compare
Module 2
Capture/Compare
Module 3
Capture/Compare
Module 4
Capture/Compare
Module 5 / WDT
Crossbar
Port I/O
Figure 33.1. PCA Block Diagram
466
Rev. 1.0