C8051F960-B-GM Datasheet, PDF (370/492 Pages) Silicon Laboratories – Ultra Low Power 128K, LCD MCU Family

C8051F96x
SFR Definition 27.20. P2MDIN: Port2 Input Mode
Bit
7
6
5
4
3
2
1
0
Name
P2MDIN[6:0]
Type
R/W
Reset
1
1
1
1
1
1
1
1
SFR Page = 0x0; SFR Address = 0xF3
Bit
Name
Function
7
Reserved Read = 1b; Must Write 1b.
6:0 P2MDIN[3:0] Analog Configuration Bits for P2.6–P2.0 (respectively).
Port pins configured for analog mode have their weak pullup and digital receiver
disabled. The digital driver is not explicitly disabled.
0: Corresponding P2.n pin is configured for analog mode.
1: Corresponding P2.n pin is not configured for analog mode.
SFR Definition 27.21. P2MDOUT: Port2 Output Mode
Bit
7
6
5
4
3
2
1
0
Name
P2MDOUT[7:0]
Type
R/W
Reset
0
0
0
0
0
0
0
0
SFR Page = 0x0; SFR Address = 0xA6
Bit
Name
Function
7:0 P2MDOUT[7:0] Output Configuration Bits for P2.7–P2.0 (respectively).
These bits control the digital driver even when the corresponding bit in register
P2MDIN is logic 0.
0: Corresponding P2.n Output is open-drain.
1: Corresponding P2.n Output is push-pull.
370
Rev. 1.0