C8051F960-B-GM Datasheet, PDF (104/492 Pages) Silicon Laboratories – Ultra Low Power 128K, LCD MCU Family

C8051F96x
SFR Definition 6.2. IREF0CF: Current Reference Configuration
Bit
7
6
5
4
3
2
1
0
Name PWMEN
PWMSS[2:0]
Type R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
SFR Page = 0xF; SFR Address = 0xB9
Bit
Name
Function
7
PWMEN PWM Enhanced Mode Enable.
Enables the PWM Enhanced Mode.
0: PWM Enhanced Mode disabled.
1: PWM Enhanced Mode enabled.
6:3
Unused
Read = 0000b, Write = don’t care.
2:0 PWMSS[2:0] PWM Source Select.
Selects the PCA channel to use for the fine-tuning control signal.
000: CEX0 selected as fine-tuning control signal.
001: CEX1 selected as fine-tuning control signal.
010: CEX2 selected as fine-tuning control signal.
011: CEX3 selected as fine-tuning control signal.
100: CEX4 selected as fine-tuning control signal.
101: CEX5 selected as fine tuning control signal.
All Other Values: Reserved.
6.2. IREF0 Specifications
See Table 4.15 on page 73 for a detailed listing of IREF0 specifications.
104
Rev. 1.0