C8051F960-B-GM Datasheet, PDF (176/492 Pages) Silicon Laboratories – Ultra Low Power 128K, LCD MCU Family

C8051F96x
14.1. Hardware Description
internal state
machine
AES0BIN
+
AES0XIN
AES0DCF
AES0KIN
Data In
Key
AES
Key
In
Core
Out
Data Out
AES0BCFG
+
AES0YOUT
Figure 14.1. AES Peripheral Block Diagram
The AES Encryption module consists of these elements.
 AES Encryption/Decryption Core
 Configuration sfrs
 Key input sfr
 Data sfrs
 Input Multiplexer
 Output Multiplexer
 Input Exclusive OR block
 Output Exclusive OR block
 Internal State Machine
176
Rev. 1.0