C8051F960-B-GM Datasheet, PDF (8/492 Pages) Silicon Laboratories – Ultra Low Power 128K, LCD MCU Family

C8051F96x
28.3. SMBus Operation .......................................................................................... 382
28.3.1. Transmitter Vs. Receiver....................................................................... 383
28.3.2. Arbitration.............................................................................................. 383
28.3.3. Clock Low Extension............................................................................. 383
28.3.4. SCL Low Timeout.................................................................................. 383
28.3.5. SCL High (SMBus Free) Timeout ......................................................... 384
28.4. Using the SMBus........................................................................................... 384
28.4.1. SMBus Configuration Register.............................................................. 384
28.4.2. SMB0CN Control Register .................................................................... 388
28.4.3. Hardware Slave Address Recognition .................................................. 390
28.4.4. Data Register ........................................................................................ 393
28.5. SMBus Transfer Modes................................................................................. 393
28.5.1. Write Sequence (Master) ...................................................................... 393
28.5.2. Read Sequence (Master) ...................................................................... 394
28.5.3. Write Sequence (Slave) ........................................................................ 395
28.5.4. Read Sequence (Slave) ........................................................................ 396
28.6. SMBus Status Decoding................................................................................ 397
29. UART0 ................................................................................................................... 402
29.1. Enhanced Baud Rate Generation.................................................................. 403
29.2. Operational Modes ........................................................................................ 404
29.2.1. 8-Bit UART ............................................................................................ 404
29.2.2. 9-Bit UART ............................................................................................ 404
29.3. Multiprocessor Communications ................................................................... 405
30. Enhanced Serial Peripheral Interface (SPI0) ..................................................... 411
30.1. Signal Descriptions........................................................................................ 412
30.1.1. Master Out, Slave In (MOSI)................................................................. 412
30.1.2. Master In, Slave Out (MISO)................................................................. 412
30.1.3. Serial Clock (SCK) ................................................................................ 412
30.1.4. Slave Select (NSS) ............................................................................... 412
30.2. SPI0 Master Mode Operation ........................................................................ 412
30.3. SPI0 Slave Mode Operation .......................................................................... 414
30.4. SPI0 Interrupt Sources .................................................................................. 415
30.5. Serial Clock Phase and Polarity .................................................................... 415
30.6. SPI Special Function Registers ..................................................................... 417
32. Timers ................................................................................................................... 444
32.1. Timer 0 and Timer 1 ...................................................................................... 446
32.1.1. Mode 0: 13-bit Counter/Timer ............................................................... 446
32.1.2. Mode 1: 16-bit Counter/Timer ............................................................... 447
32.1.3. Mode 2: 8-bit Counter/Timer with Auto-Reload..................................... 447
32.1.4. Mode 3: Two 8-bit Counter/Timers (Timer 0 Only)................................ 448
32.2. Timer 2 .......................................................................................................... 454
32.2.1. 16-bit Timer with Auto-Reload............................................................... 454
32.2.2. 8-bit Timers with Auto-Reload............................................................... 455
32.2.3. Comparator 0/SmaRTClock Capture Mode .......................................... 455
32.3. Timer 3 .......................................................................................................... 460
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Rev. 1.0