C8051F960-B-GM Datasheet, PDF (224/492 Pages) Silicon Laboratories – Ultra Low Power 128K, LCD MCU Family

C8051F96x
Table 16.3. Special Function Registers
SFRs are listed in alphabetical order. All undefined SFR locations are reserved
Register
Address SFR Page
Description
ADC0AC
0xBA
0x0 _{ADC0 Accumulator Configuration}
ADC0CF
0xBC
0x0 _{ADC0 Configuration}
ADC0CN
0xE8 All pages ADC0 Control
ADC0GTH
0xC4
0x0 _{ADC0 Greater-Than Compare High}
ADC0GTL
0xC3
0x0 _{ADC0 Greater-Than Compare Low}
ADC0H
0xBE
0x0 ADC0 High
ADC0L
0xBD
0x0 _{ADC0 Low}
ADC0LTH
0xC6
0x0 _{ADC0 Less-Than Compare Word High}
ADC0LTL
0xC5
0x0 ADC0 Less-Than Compare Word Low
ADC0MX
0xBB
0x0 _{ADC0 MUX}
ADC0PWR
0xBA
0xF _{ADC0 Burst Mode Power-Up Time}
ADC0TK
0xBB
0xF ADC0 Tracking Control
AES0BCFG
0xE9
0x2 _{AES0 Block Configuration}
AES0BIN
0xEB
0x2 _{AES0 Block Input}
AES0DCFG
0xEA
0x2 AES0 Data Configuration
AES0KIN
0xED
0x2 _{AES0 Key Input}
AES0XIN
0xEC
0x2 _{AES0 XOR Input}
AES0YOUT
0xF5
0x2 AES Y Out
CKCON
0x8E
0x0 _{Clock Control}
CLKMODE
0xFD
0xF _{Clock Mode}
CLKSEL
0xA9
0x0 and _{Clock Select}
0xF
CPT0CN
0x9B
0x0 _{Comparator0 Control}
CPT0MD
0x9D
0x0 _{Comparator0 Mode Selection}
CPT0MX
0x9F
0x0 Comparator0 Mux Selection
CPT1CN
0x9A
0x0 _{Comparator1 Control}
CPT1MD
0x9C
0x0 _{Comparator1 Mode Selection}
CPT1MX
0x9E
0x0 Comparator1 Mux Selection
CRC0AUTO
0x96
0xF _{CRC0 Automatic Control}
CRC0CNT
0x97
0xF _{CRC0 Automatic Flash Sector Count}
CRC0CN
0x92
0xF CRC0 Control
CRC0DAT
0x91
0xF _{CRC0 Data}
CRC0FLIP
0x94
0xF _{CRC0 Flip}
CRC0IN
0x93
0xF CRC0 Input
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