C8051F960-B-GM Datasheet, PDF (73/492 Pages) Silicon Laboratories – Ultra Low Power 128K, LCD MCU Family

C8051F96x
Table 4.15. IREF0 Electrical Characteristics
V_BAT = 1.8 to 3.8 V, –40 to +85 °C, unless otherwise specified.
Parameter
Conditions
Min
Typ
Max
Units
Static Performance
Resolution
6
bits
Output Compliance Range
Integral Nonlinearity
Low Power Mode, Source
0
High Current Mode, Source
0
Low Power Mode, Sink
0.3
High Current Mode, Sink
0.8
— V_BAT – 0.4
—
—
V_BAT – 0.8
V_BAT
V
—
V_BAT
—
<±0.2
±1.0
LSB
Differential Nonlinearity
—
<±0.2
±1.0
LSB
Offset Error
—
<±0.1
±0.5
LSB
Full Scale Error
Absolute Current Error
Low Power Mode, Source
—
—
±5
%
High Current Mode, Source —
—
±6
%
Low Power Mode, Sink
—
—
±8
%
High Current Mode, Sink
—
—
±8
%
Low Power Mode
Sourcing 20 µA
—
<±1
±3
%
Dynamic Performance
Output Settling Time to 1/2 LSB
—
300
—
ns
Startup Time
—
1
—
µs
Power Consumption
Net Power Supply Current 
Low Power Mode, Source
(V_BAT supplied to IREF0 minus
IREF0DAT = 000001
—
10
—
µA
any output source current)
IREF0DAT = 111111
—
10
—
µA
High Current Mode, Source
IREF0DAT = 000001
—
10
—
µA
IREF0DAT = 111111
—
10
—
µA
Low Power Mode, Sink
IREF0DAT = 000001
—
1
—
µA
IREF0DAT = 111111
—
11
—
µA
High Current Mode, Sink
IREF0DAT = 000001
—
12
—
µA
IREF0DAT = 111111
—
81
—
µA
Note: Refer to “6.1. PWM Enhanced Mode” on page 103 for information on how to improve IREF0 resolution.
Rev. 1.0
73