C8051F960-B-GM Datasheet, PDF (170/492 Pages) Silicon Laboratories – Ultra Low Power 128K, LCD MCU Family

C8051F96x
13.3. CRC Seed Value
Normally, the initial value or the CRC results is cleared to 0x0000. However, a CRC might be specified with
an initial value preset to all ones (0xFFFF).
The steps to preset the CRC with all ones is as follows:
1. Set the SEED bit to 1.
2. Reset the CRC1 module by setting the CLR bit to 1 in CRC1CN.
3. Clear the SEED bit to 0.
The CRC1 module is now ready to calculate a CRC using a CRC seed value of 0xFFFF.
13.4. Inverting the Final Value
Sometimes it is necessary to invert the final value. This will take the ones complement of the final result.
The steps to flip the final CRC results are as follows:
1. Clear the CRC module by setting the CLR bit in CRC1CN SFR.
2. Write the polynomial to CRC1POLH:L.
3. Write all data bytes to CRC1IN.
4. Set the INV bit in the CRC1CN SFR to invert the final results.
5. Read the final CRC results from CRC1OUTH:L.
Clear the FLIP bit in the CRC1CN SFR.
13.5. Flipping the Final Value
The steps to flip the final CRC results are as follows:
1. Clear the CRC module by setting the CLR bit in CRC1CN SFR.
2. Write the polynomial to CRC1POLH:L.
3. Write all data bytes to CRC1IN.
4. Set the FLIP bit in the CRC1CN SFR to flip the final results.
5. Read the final CRC results from CRC1OUTH:L.
6. Clear the FLIP bit in the CRC1CN SFR.
The flip operation will exchange bit 15 with bit 0, bit 14 with bit 1, bit 13 with bit 2, and so on.
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