C8051F960-B-GM Datasheet, PDF (193/492 Pages) Silicon Laboratories – Ultra Low Power 128K, LCD MCU Family

C8051F96x
 Enable first four DMA channels setting bits 0 to 2 in the DMA0EN sfr
 Configure the AES Module data flow for XOR on input data by writing 0x01 to the AES0DCFG sfr.
 Write key size to bits 1 and 0 of the AES0BCFG
 Configure the AES core for encryption by setting the bit 2 of AES0BCFG
 Initiate the encryption operation be setting bit 3 of AES0BCFG
 Wait on the DMA interrupt from DMA channel 3
 Disable the AES Module by clearing bit 2 of AES0BCFG
 Disable the DMA by writing 0x00 to DMA0EN
Rev. 1.0
193