C8051F960-B-GM Datasheet, PDF (390/492 Pages) Silicon Laboratories – Ultra Low Power 128K, LCD MCU Family

C8051F96x
Bit
MASTER
TXMODE
STA
STO
ACKRQ
ARBLOST
ACK
SI
Table 28.3. Sources for Hardware Changes to SMB0CN
Set by Hardware When:
Cleared by Hardware When:
• A START is generated.
• A STOP is generated.
• Arbitration is lost.
• START is generated.
• SMB0DAT is written before the start of an
SMBus frame.
• A START is detected.
• Arbitration is lost.
• SMB0DAT is not written before the
start of an SMBus frame.
• A START followed by an address byte is
received.
• Must be cleared by software.
• A STOP is detected while addressed as a
slave.
• A pending STOP is generated.
• Arbitration is lost due to a detected STOP.
• A byte has been received and an ACK
response value is needed (only when hard- • After each ACK cycle.
ware ACK is not enabled).
• A repeated START is detected as a MASTER
when STA is low (unwanted repeated START).
• SCL is sensed low while attempting to gener-
ate a STOP or repeated START condition.
• Each time SI is cleared.
• SDA is sensed low while transmitting a 1
(excluding ACK bits).
• The incoming ACK value is low 
• The incoming ACK value is high (NOT
(ACKNOWLEDGE).
ACKNOWLEDGE).
• A START has been generated.
• Lost arbitration.
• A byte has been transmitted and an
ACK/NACK received.
• A byte has been received.
• Must be cleared by software.
• A START or repeated START followed by a
slave address + R/W has been received.
• A STOP has been received.
28.4.3. Hardware Slave Address Recognition
The SMBus hardware has the capability to automatically recognize incoming slave addresses and send an
ACK without software intervention. Automatic slave address recognition is enabled by setting the EHACK
bit in register SMB0ADM to 1. This will enable both automatic slave address recognition and automatic
hardware ACK generation for received bytes (as a master or slave). More detail on automatic hardware
ACK generation can be found in Section 28.4.2.2.
The registers used to define which address(es) are recognized by the hardware are the SMBus Slave
Address register (SFR Definition 28.3) and the SMBus Slave Address Mask register (SFR Definition 28.4).
A single address or range of addresses (including the General Call Address 0x00) can be specified using
these two registers. The most-significant seven bits of the two registers are used to define which
addresses will be ACKed. A 1 in bit positions of the slave address mask SLVM[6:0] enable a comparison
between the received slave address and the hardware’s slave address SLV[6:0] for those bits. A 0 in a bit
of the slave address mask means that bit will be treated as a “don’t care” for comparison purposes. In this
case, either a 1 or a 0 value are acceptable on the incoming slave address. Additionally, if the GC bit in
register SMB0ADR is set to 1, hardware will recognize the General Call Address (0x00). Table 28.4 shows
some example parameter settings and the slave addresses that will be recognized by hardware under
those conditions.
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Rev. 1.0