C8051F960-B-GM Datasheet, PDF (38/492 Pages) Silicon Laboratories – Ultra Low Power 128K, LCD MCU Family

C8051F96x
Name
P2.1
P2.2
P2.3
P2.4
COM0
P2.5
COM1
P2.6
COM2
P2.7
COM2
P3.0
LCD0
P3.1
LCD1
Table 3.1. Pin Definitions for the C8051F96x (Continued)
Pin Numbers
DQFN76 TQFP80 QFN40
A26
49
26
A25
48
25
A24
47
24
A23
46
23
Type Description
D I/O or Port 2.1. See Port I/O Section for a complete
A In description. VIORF supply. May also be used as
MISO for SPI1.
D I/O or Port 2.2. See Port I/O Section for a complete
A In ^{description. VIORF supply. May also be used as}
MOSI for SPI1.
D I/O or Port 2.3. See Port I/O Section for a complete
A In ^{description. VIORF supply. May also be used as}
NSS for SPI1.
D I/O or Port 2.4. See Port I/O Section for a complete
A In description.
A22
45
AO
LCD Common Pin 0 (Backplane Driver)
22 D I/O or Port 2.5. See Port I/O Section for a complete
A In ^description.
A21
43
AO
LCD Common Pin 1 (Backplane Driver)
21 D I/O or Port 2.6. See Port I/O Section for a complete
A In ^description.
A20
41
AO
LCD Common Pin 2 (Backplane Driver)
20 D I/O or Port 2.7. See Port I/O Section for a complete
A In ^description.
A19
39
AO
LCD Common Pin 3 (Backplane Driver)
19 D I/O or Port 3.0. See Port I/O Section for a complete
A In ^description.
A18
38
AO
LCD Segment Pin 0
18 D I/O or Port 3.1. See Port I/O Section for a complete
A In description.
AO
LCD Segment Pin 1
38
Rev. 1.0