C8051F960-B-GM Datasheet, PDF (286/492 Pages) Silicon Laboratories – Ultra Low Power 128K, LCD MCU Family

C8051F96x
23. Clocking Sources
C8051F96x devices include a programmable precision internal oscillator, an external oscillator drive cir-
cuit, a low power internal oscillator, and a SmaRTClock real time clock oscillator. The precision internal
oscillator can be enabled/disabled and calibrated using the OSCICN and OSCICL registers, as shown in
Figure 23.1. The external oscillator can be configured using the OSCXCN register. The low power internal
oscillator is automatically enabled and disabled when selected and deselected as a clock source. SmaRT-
Clock operation is described in the SmaRTClock oscillator chapter.
The system clock (SYSCLK) can be derived from the precision internal oscillator, external oscillator, low
power internal oscillator, low power internal oscillator divided by 8, or SmaRTClock oscillator. The global
clock divider can generate a system clock that is 1, 2, 4, 8, 16, 32, 64, or 128 times slower that the selected
input clock source. Oscillator electrical specifications can be found in the Electrical Specifications Chapter.
Option 2
VDD
Option 3
XTAL2
XTAL2
Option 1
XTAL1
10M
XTAL2
Option 4
XTAL2
OSCICL
OSCICN
CLKSEL
EN
Precision
Internal Oscillator
External
Oscillator
Drive Circuit
Precision Internal Oscillator
External Oscillator
Low Power Internal Oscillator
Low Power Internal
Oscillator Divided by 8
8
SmaRTClock Oscillator
CLKRDY
n
Clock Divider
SYSCLK
Low Power
Internal Oscillator
SmaRTClock
Oscillator
OSCXCN
Figure 23.1. Clocking Sources Block Diagram
The proper way of changing the system clock when both the clock source and the clock divide value are
being changed is as follows:
If switching from a fast “undivided” clock to a slower “undivided” clock:
1. Change the clock divide value.
2. Poll for CLKRDY > 1.
3. Change the clock source.
If switching from a slow “undivided” clock to a faster “undivided” clock:
1. Change the clock source.
2. Change the clock divide value.
3. Poll for CLKRDY > 1.
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