C8051F960-B-GM Datasheet, PDF (268/492 Pages) Silicon Laboratories – Ultra Low Power 128K, LCD MCU Family

C8051F96x
SFR Definition 19.7. PCON: Power Management Control Register
Bit
7
6
5
Name
GF[4:0]
Type
R/W
Reset 0
0
0
SFR Page = All Pages; SFR Address = 0x87
Bit Name
Description
7:3 GF[5:0] General Purpose Flags
2 PWRSEL Power Select
1
STOP Stop Mode Select
0
IDLE Idle Mode Select
4
3
2
1
0
PWRSEL STOP
IDLE
R/W
W
W
0
0
0
0
0
Write
Read
Sets the logic value.
Returns the logic value.
0: VBAT is selected as the input to VREG0.
1: VDC is selected as the input to VREG0.
Writing 1 places the
N/A
device in Stop Mode.
Writing 1 places the
N/A
device in Idle Mode.
19.9. Power Management Specifications
See Table 4.7 on page 69 for detailed Power Management Specifications.
268
Rev. 1.0