C8051F960-B-GM Datasheet, PDF (111/492 Pages) Silicon Laboratories – Ultra Low Power 128K, LCD MCU Family

C8051F96x
SFR Definition 7.4. CPT1MD: Comparator 1 Mode Selection
Bit
7
6
5
4
3
2
1
0
Name
CP1RIE CP1FIE
CP1MD[1:0]
Type ^R/W
R
R/W
R/W
R
R
R/W
Reset
1
0
0
0
0
0
1
0
SFR Page = 0x0; SFR Address = 0x9C
Bit
Name
Function
7 Reserved Read = 1b, Must Write 1b.
6
Unused _Unused.
Read = 0b, Write = don’t care.
5
CP1RIE _{Comparator1 Rising-Edge Interrupt Enable.}
0: Comparator1 Rising-edge interrupt disabled.
1: Comparator1 Rising-edge interrupt enabled.
4
CP1FIE _{Comparator1 Falling-Edge Interrupt Enable.}
0: Comparator1 Falling-edge interrupt disabled.
1: Comparator1 Falling-edge interrupt enabled.
3:2 Unused Read = 00b, Write = don’t care.
1:0 CP1MD[1:0] _{Comparator1 Mode Select}
These bits affect the response time and power consumption for Comparator1.
00: Mode 0 (Fastest Response Time, Highest Power Consumption)
01: Mode 1
10: Mode 2
11: Mode 3 (Slowest Response Time, Lowest Power Consumption)
Rev. 1.0
111