C8051F960-B-GM Datasheet, PDF (376/492 Pages) Silicon Laboratories – Ultra Low Power 128K, LCD MCU Family

C8051F96x
SFR Definition 27.32. P5MDIN: Port5 Input Mode
Bit
7
6
5
4
3
2
1
0
Name
P5MDIN[7:0]
Type
R/W
Reset
1
1
1
1
1
1
1
1
SFR Page = 0xF; SFR Address = 0xF3
Bit
Name
Function
7:0 P5MDIN[3:0] Analog Configuration Bits for P5.7–P5.0 (respectively).
Port pins configured for analog mode have their weak pullup and digital receiver
disabled. The digital driver is not explicitly disabled.
0: Corresponding P5.n pin is configured for analog mode.
1: Corresponding P5.n pin is not configured for analog mode.
Note:
SFR Definition 27.33. P5MDOUT: Port5 Output Mode
Bit
7
6
5
4
3
2
1
0
Name
P5MDOUT[7:0]
Type
R/W
Reset
0
0
0
0
0
0
0
0
SFR Page = 0xF; SFR Address = 0xFA
Bit
Name
Function
7:0 P5MDOUT[7:0] Output Configuration Bits for P5.7–P5.0 (respectively).
These bits control the digital driver even when the corresponding bit in register
P5MDIN is logic 0.
0: Corresponding P5.n Output is open-drain.
1: Corresponding P5.n Output is push-pull.
Note:
376
Rev. 1.0