C8051F960-B-GM Datasheet, PDF (48/492 Pages) Silicon Laboratories – Ultra Low Power 128K, LCD MCU Family

C8051F96x
3.1.3. Soldering Guidelines
3.1.3.1. Solder Mask Design
All metal pads are to be non-solder mask defined (NSMD). Clearance between the solder mask and the
metal pad is to be 60 m minimum, all the way around the pad.
3.1.3.2. Stencil Design
1. A stainless steel, laser-cut and electro-polished stencil with trapezoidal walls should be used to
assure good solder paste release.
2. The stencil thickness should be 0.125 mm (5 mils).
3. The ratio of stencil aperture to land pad size should be 1:1 for all perimeter pads.
4. A 2x2 array of 1.25 mm square openings on 1.60 mm pitch should be used for the center ground
pad.
3.1.3.3. Card Assembly
1. A No-Clean, Type-3 solder paste is recommended.
2. The recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification for Small Body
Components.
3.1.3.4. Inner via placement
1. Inner via placement per Figure 3.6.
2. Reccomended via hole size is 0.150 mm (6 mil) laser drilled holes.
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