C8051F960-B-GM Datasheet, PDF (131/492 Pages) Silicon Laboratories – Ultra Low Power 128K, LCD MCU Family

C8051F96x
Table 10.1. EMIF Pinout (C8051F960/2/4/6/8)
Multiplexed Mode
Signal Name
Port Pin
8-Bit Mode¹ 16-Bit Mode²
RD
P3.6
P3.6
WR
P3.7
P3.7
ALE
P3.5
P3.5
AD0
P6.0
P6.0
AD1
P6.1
P6.1
AD2
P6.2
P6.2
AD3
P6.3
P6.3
AD4
P6.4
P6.4
AD5
P6.5
P6.5
AD6
P6.6
P6.6
AD7
P6.7
P6.7
A8
—
P5.0
A9
—
P5.1
A10
—
P5.2
A11
—
P5.3
A12
—
P5.4
A13
—
P5.5
A14
—
P5.6
A15
—
P5.7
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Required I/O:
11
19
Notes:
1. Using 8-bit movx instruction without bank select.
2. Using 16-bit movx instruction.
Non Multiplexed Mode
Signal Name
Port Pin
8-Bit Mode ¹ 16-Bit Mode²
RD
P3.6
P3.6
WR
P3.7
P3.7
D0
P6.0
P6.0
D1
P6.1
P6.1
D2
P6.2
P6.2
D3
P6.3
P6.3
D4
P6.4
P6.4
D5
P6.5
P6.5
D6
P6.6
P6.6
D7
P6.7
P6.7
A0
P5.0
P5.0
A1
P5.1
P5.1
A2
P5.2
P5.2
A3
P5.3
P5.3
A4
P5.4
P5.4
A5
P5.5
P5.5
A6
P5.6
P5.6
A7
P5.7
P5.7
A8
—
P4.0
A9
—
P4.1
A10
—
P4.2
A11
—
P4.3
A12
—
P4.4
A13
—
P4.5
A14
—
P4.6
A15
—
P4.7
Required I/O:
18
26
Rev. 1.0
131