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Z8F1680SH020SG Datasheet, PDF (88/412 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers | |||
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Z8 Encore! XP® F1680 Series
Product Specification
63
7.11.7. Port AâE Stop Mode Recovery Source Enable
Subregisters
The Port AâE Stop Mode Recovery Source Enable Subregister, shown in Table 27, is
accessed through the Port AâE Control Register by writing 05H to the Port AâE Address
Register. Setting the bits in the Port AâE Stop Mode Recovery Source Enable subregisters
to 1 configures the specified port pins as Stop Mode Recovery sources. During STOP
Mode, any logic transition on a port pin enabled as a Stop Mode Recovery source initiates
Stop Mode Recovery.
Table 27. Port AâE Stop Mode Recovery Source Enable Subregisters (PxSMRE)
Bits
Field
Reset
R/W
Address
7
6
5
4
3
2
1
0
PSMRE7 PSMRE6 PSMRE5 PSMRE4 PSMRE3 PSMRE2 PSMRE1 PSMRE0
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
If 05H in Port AâE Address Register, accessible through the Port AâE Control Register.
Bit
[7:0]ï
PSMRE
Description
Port Stop Mode Recovery Source Enabled
0 = The Port pin is not configured as a Stop Mode Recovery source. Transitions on this pin
during STOP Mode do not initiate Stop Mode Recovery.
1 = The Port pin is configured as a Stop Mode Recovery source. Any logic transition on this pin
during STOP Mode initiates Stop Mode Recovery.
7.11.8. Port AâE Pull-up Enable Subregisters
The Port AâE Pull-up Enable Subregister, shown in Table 28, is accessed through the Port
AâE Control Register by writing 06H to the Port AâE Address Register. Setting the bits in
the Port AâE Pull-up Enable subregisters enables a weak internal resistive pull-up on the
specified port pins.
Table 28. Port AâE Pull-Up Enable Subregisters (PxPUE)
Bits
Field
Reset
R/W
Address
7
6
5
4
3
2
1
0
PPUE7 PPUE6 PPUE5 PPUE4 PPUE3 PPUE2 PPUE1 PPUE0
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
If 06H in Port AâE Address Register, accessible through the Port AâE Control Register.
Bit
[7:0]ï
PPUE
Description
Port Pull-up Enabled
0 = The weak pull-up on the Port pin is disabled.
1 = The weak pull-up on the Port pin is enabled.
PS025015-1212
PRELIMINARY
General-Purpose Input/Output
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