Z8F1680SH020SG Datasheet, PDF (303/412 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F1680 Series
Product Specification
278
ld R1, #%60
ldc R2, @RR0 ; R2 now contains the calibration value
21.2. Flash Option Bit Control Register Definitions
This section defines the features of the following Flash Option Bit Control registers.
User Option Bits: see page 278
Trim Bit Data Option Bits: see page 281
Trim Bit Address Option Bits: see page 281
Trim Bit Address Space: see page 282
Zilog Calibration Option Bits: see page 289
21.2.1. User Option Bits
The first two bytes of Flash program memory, at addresses 0000H and 0001H, are
reserved for the user-programmable Flash option bits, as shown in Tables 140 and 141.
Table 140. Flash Option Bits at Program Memory Address 0000H
Bits
7
6
5
4
3
Field WDT_RES WDT_AO OSC_SEL[1:0] VBO_AO
Reset
U
U
U
U
U
R/W
R/W
R/W
R/W
R/W
R/W
Address
Program Memory 0000H
Note: U = Unchanged by Reset. R/W = Read/Write.
2
FRP
U
R/W
1
PRAM_M
U
R/W
0
FWP
U
R/W
Bit
[7]
WDT_RES
[6]
WDT_AO
Description
Watchdog Timer Reset
0 = Watchdog Timer time-out generates an interrupt request. Interrupts must be globally
enabled for the eZ8 CPU to acknowledge the interrupt request.
1 = Watchdog Timer time-out causes a System Reset. This setting is the default for
unprogrammed (erased) Flash.
Watchdog Timer Always ON
0 = Watchdog Timer is automatically enabled upon application of system power.
Watchdog Timer cannot be disabled.
1 = Watchdog Timer is enabled upon execution of the WDT instruction. After it is
enabled, the Watchdog Timer can only be disabled by a Reset or Stop Mode
Recovery. This setting is the default for unprogrammed (erased) Flash.
PS025015-1212
PRELIMINARY
Flash Option Bits