Z8F1680SH020SG Datasheet, PDF (51/412 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F1680 Series
Product Specification
26
Table 8. Register File Address Map (Continued)
Address (Hex) Register Description
F4B
LIN UART1 Control 1—Multiprocessor Control
LIN UART1 Control 1—Noise Filter Control
LIN UART1 Control 1—LIN Control
F4C
LIN UART1 Mode Select and Status
F4D
UART1 Address Compare
F4E
UART1 Baud Rate High Byte
F4F
UART1 Baud Rate Low Byte
I²C
F50
I²C Data
F51
I²C Interrupt Status
F52
I²C Control
F53
I²C Baud Rate High Byte
F54
I²C Baud Rate Low Byte
F55
I²C State
F56
I²C Mode
F57
I²C Slave Address
F58-F5F
Reserved
Mnemonic Reset (Hex)¹ Page #
U1CTL1
00
172
U1CTL1
00
174
U1CTL1
00
175
U1MDSTAT
00
168
U1ADDR
00
177
U1BRH
FF
177
U1BRL
FF
178
I2CDATA
00
244
I2CISTAT
80
245
I2CCTL
00
247
I2CBRH
FF
248
I2CBRL
FF
249
I2CSTATE
02
251
I2CMODE
00
252
I2CSLVAD
00
255
—
XX
Enhanced Serial Peripheral Interface (ESPI)
F60
ESPI Data
ESPIDATA
XX
214
F61
ESPI Transmit Data Command
ESPITDCR
00
214
F62
ESPI Control
ESPICTL
00
215
F63
ESPI Mode
ESPIMODE
00
217
F64
ESPI Status
ESPISTAT
01
219
F65
ESPI State
ESPISTATE
00
220
F66
ESPI Baud Rate High Byte
ESPIBRH
FF
220
F67
ESPI Baud Rate Low Byte
ESPIBRL
FF
220
F68–F6F
Reserved
—
XX
Notes:
1. XX=Undefined.
2. The Reserved space can be configured as General-Purpose Register File RAM depending on the user option bits
(see the User Option Bits chapter on page 277) and the on-chip PRAM size (see the Ordering Information chapter
on page 372). If the PRAM is programmed as General-Purpose Register File RAM on Reserved space, the start-
ing address always begins immediately after the end of General-Purpose Register File RAM.
PS025015-1212
PRELIMINARY
Register Map