Z8F1680SH020SG Datasheet, PDF (48/412 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F1680 Series
Product Specification
23
Chapter 4. Register Map
Table 8 provides an address map to the register file contained in all Z8 Encore! XP F1680
Series devices. Not all devices and package styles in this product series support the ADC,
nor all of the GPIO ports. Therefore, consider the registers for unimplemented peripherals
to be reserved.
Table 8. Register File Address Map
Address (Hex) Register Description
Mnemonic Reset (Hex)¹ Page #
General Purpose RAM
Z8F2480 Device
000–7FF
800–EFF
General-Purpose Register File RAM
Reserved²
—
XX
—
XX
Z8F1680 Device
000–7FF
800–EFF
General-Purpose Register File RAM
Reserved²
Z8F0880 Device
—
XX
—
XX
000–3FF
400–EFF
General-Purpose Register File RAM
Reserved²
—
XX
—
XX
Special Purpose Registers
Timer 0
F00
Timer 0 High Byte
T0H
00
109
F01
Timer 0 Low Byte
T0L
01
109
F02
Timer 0 Reload High Byte
F03
Timer 0 Reload Low Byte
T0RH
T0RL
FF
110
FF
110
F04
Timer 0 PWM0 High Byte
T0PWM0H
00
110
F05
Timer 0 PWM0 Low Byte
F06
Timer 0 Control 0
T0PWM0L
00
111
T0CTL0
00
112
F07
Timer 0 Control 1
T0CTL1
00
113
Notes:
1. XX=Undefined.
2. The Reserved space can be configured as General-Purpose Register File RAM depending on the user option bits
(see the User Option Bits chapter on page 277) and the on-chip PRAM size (see the Ordering Information chapter
on page 372). If the PRAM is programmed as General-Purpose Register File RAM on Reserved space, the start-
ing address always begins immediately after the end of General-Purpose Register File RAM.
PS025015-1212
PRELIMINARY
Register Map