Z8F1680SH020SG Datasheet, PDF (156/412 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F1680 Series
Product Specification
131
writes to this register are buffered and transferred into the register when the counter
reaches the end of the count cycle.
Modulo
Mode
Period
=
-^P----^r--^e----^s---^c----^a---^l--^e----^r---^-----^--^R-----^e----^l-^o----^a----^d-----^V-----^a---^l--^u----^e-----+----1----^
f_MCTclk
Up  Down
Mode
Period
=
2-----_-----P_----r_---e_---s_----c_---a_----l_-e_----r_----_----R_-----e_----l_-o_----a_----d_-----V_----a_----l_--u_----e_-
f_MCTclk
Table 71. Multi-Channel Timer Reload High and Low Byte Registers (MCTRH, MCTRL)
Bit
7
6
5
4
3
2
1
0
Field
MCTRH
Reset
1
1
1
1
1
1
1
1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Address
FA2H
Bit
7
6
5
4
3
2
1
0
Field
MCTRL
Reset
1
1
1
1
1
1
1
1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Address
FA3H
Bit
Description
[7:0]
Multi-Channel Timer Reload Register High and Low
MCTRH, These two bytes form the 16-bit reload value, {MCTRH[7:0], MCTRL[7:0]}. This value sets the
MCTRL Multi-Channel Timer period in Modulo and Up/Down Count modes.
The value written to the MCTRH is stored in a temporary holding register. When a write
to the MCTRL occurs, the temporary holding register value is written to the MCTRH.
This operation allows simultaneous updates of the 16-bit Multi-Channel Timer reload
value.
10.7.4. Multi-Channel Timer Subaddress Register
The Multi-Channel Timer Subaddress Register stores 3-bit subaddresses for subregisters.
These three bits are from MCTSAR[2:0], all other bits are reserved. When accessing sub-
register (writing or reading), set MCTSA right value first, then access subregister by writ-
ing or reading Subregisters 0, 1, or 2.
PS025015-1212
PRELIMINARY
Multi-Channel Timer