Z8F1680SH020SG Datasheet, PDF (219/412 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F1680 Series
Product Specification
194
14.3.6. Sample Time Register
The Sample Time Register, shown in Table 106, is used to program the length of active
time for the sample after a conversion begins by setting the start bit in the ADC Control
Register or initiated by the PWM. The number of system clock cycles required for sample
time varies from system to system, depending on the clock period used. The system
designer should program this register to contain the number of system clocks required to
meet a 1.8 µs minimum sample time.
Table 106. Sample Time (ADCST)
Bits
7
6
5
4
3
2
1
0
Field
Reserved
ST
Reset
0
1
1
1
1
1
1
R/W
R/W
R/W
Address
F75H
Bit Position Value (H)
[7:6]
0
[5:0]
ST
00–3F
Description
Reserved; must be 0.
Sample Hold time in number of system clock periods to meet 1.8 µs minimum.
PS025015-1212
PRELIMINARY
Analog-to-Digital Converter