Z8F1680SH020SG Datasheet, PDF (278/412 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F1680 Series
Product Specification
253
Table 127. I2CSTATE_L (Continued)
State
I2CSTATE_H
1000–1111
Substate
I2CSTATE_L
0111
0110
0101
0100
0011
0010
0001
0000
1000
Substate Name
Send/Receive bit 7
Send/Receive bit 6
Send/Receive bit 5
Send/Receive bit 4
Send/Receive bit 3
Send/Receive bit 2
Send/Receive bit 1
Send/Receive bit 0
Send/Receive
Acknowledge
State Description
Sending/Receiving most significant bit.
Sending/Receiving least significant bit.
Sending/Receiving Acknowledge.
17.3.6. I²C Mode Register
The I²C Mode Register, shown in Table 128, provides control over master versus slave
operating mode, slave address and diagnostic modes.
Table 128. I²C Mode Register (I2C Mode = F56H)
Bits
Field
Reset
R/W
Address
7
Reserved
0
R
6
5
MODE[1:0]
0
R/W
4
3
IRM
GCE
0
0
R/W
R/W
F56H
2
1
SLA[9:8]
0
R/W
0
DIAG
0
R/W
Bit
[7]
[6:5]
MODE[1:0]
Description
Reserved; must be 0.
Selects the I²C Controller Operational Mode
00 = MASTER/SLAVE capable (supports multi-master arbitration) with 7-bit Slave address.
01 = MASTER/SLAVE capable (supports multi-master arbitration) with 10-bit slave address.
10 = Slave Only capable with 7-bit address.
11 = Slave Only capable with 10-bit address.
PS025015-1212
PRELIMINARY
I2C Master/Slave Controller