Z8F1680SH020SG Datasheet, PDF (135/412 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F1680 Series
Product Specification
110
Bit
Field
Reset
R/W
Address
In COMPARE Mode, the Timer Reload High and Low Byte registers store the 16-bit
Compare value.
Table 57. Timer 0–2 Reload High Byte Register (TxRH)
7
6
5
4
3
2
1
0
TRH
1
1
1
1
1
1
1
1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
F02H, F0AH, F12H
Table 58. Timer 0–2 Reload Low Byte Register (TxRL)
Bit
7
6
5
4
3
2
1
0
Field
TRL
Reset
1
1
1
1
1
1
1
1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Address
F03H, F0BH, F13H
Bit
[7:0]
TRH,
TRL
Description
Timer Reload Register High and Low
These two bytes form the 16-bit reload value, {TRH[7:0], TRL[7:0]}. This value is used to set
the maximum count value which initiates a timer reload to 0001H. In COMPARE Mode, these
two bytes form the 16-bit Compare value.
Bit
Field
Reset
R/W
Address
9.3.3. Timer 0–2 PWM0 High and Low Byte Registers
The Timer 0–2 PWM0 High and Low Byte (TxPWM0H and TxPWM0L) registers, shown
in Tables 59 and 60, are used for Pulse Width Modulator (PWM) operations. These
registers also store the Capture values for the CAPTURE, CAPTURE/COMPARE and
DEMODULATION Modes. When the timer is enabled, writes to these registers are
buffered, and loading of the registers is delayed until a timer reload to 0001H occurs –
that is, unless PWM0UE = 1.
Table 59. Timer 0–2 PWM0 High Byte Register (TxPWM0H)
7
6
5
4
3
2
1
0
PWM0H
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
F04H, F0CH, F14H
PS025015-1212
PRELIMINARY
Timers