Z8F1680SH020SG Datasheet, PDF (152/412 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F1680 Series
Product Specification
127
FFFFH
Reload
MCTCH0
MCTCH1
0H
Dead Time
TCH0 Output
TCH1 Output
CI
CI
CI
CI
CI
TI
CI
CI _{Channel Interrupts (CI)}
CI
TI ^{Timer Interrupts (TI)}
Figure 17. Count Up/Down Mode with PWM Channel Outputs and Deadband
10.6.2. Multiple Timer Intervals Generation
Figure 18 shows a timing diagram featuring two constant time intervals, T0 and T1. The
timer is in Count Modulo Mode with reload = FFFFH. Channels 0 and 1 are set up for
CONTINUOUS COMPARE operation. After every channel compare interrupt, the
channel Capture/Compare registers are updated in the interrupt service routine by adding a
constant equal to the time interval required. This operation requires that the Channel
Update Enable (CHUE) bit must be set in channels 0 and 1 so that writes to the Capture/
Compare registers take affect immediately.
PS025015-1212
PRELIMINARY
Multi-Channel Timer