Z8F1680SH020SG Datasheet, PDF (114/412 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F1680 Series
Product Specification
89
3. Upon reaching the reload value, the timer outputs a pulse on the Timer Output pin,
generates an interrupt and resets the count value in the Timer High and Low Byte reg-
isters to 0001H. The period of the output pulse is a single timer clock. The TPOL bit
also sets the polarity of the output pulse.
4. The Timer now idles until the next trigger event.
In TRIGGERED ONE-SHOT Mode, the timer clock always provides the timer input. The
timer period is shown in the following equation:
Triggered ONE-SHOT Mode Time-Out Period (s)
=
_{---R----e---l-o---a---d----V-----a--l--u---e---------S---t--a--r--t----V----a---l-u---e---}_----_{-----P---r--e---s--c---a--l--e-}
Timer Clock Frequency (Hz)
Table 53 provides an example initialization sequence for configuring Timer 0 in TRIG-
GERED ONE-SHOT Mode and initiating operation.
Table 53. TRIGGERED ONE-SHOT Mode Initialization Example
Register
T0CTL0
T0CTL1
T0CTL2
Value
E0H
03H
01H
T0H
T0L
T0RH
T0RL
PAADDR
PACTL[1:0]
00H
01H
ABH
CDH
02H
11B
IRQ0ENH[5] 0B
IRQ0ENL[5] 0B
Comment
TMODE[3:0] = 1011B selects TRIGGERED ONE-SHOT Mode.
TICONFIG[1:0] = 11B enables interrupts on Timer reload only.
CSC = 0 selects the Timer Input (Trigger) from the GPIO pin.
PWMD[2:0] = 000B has no effect.
INPCAP = 0 has no effect.
TEN = 0 disables the timer.
TPOL = 0 enables triggering on rising edge of Timer. Input and sets Timer
Out signal to 0.
PRES[2:0] = 000B sets prescaler to divide by 1.
TCLKS = 1 sets 32 kHz peripheral clock as the Timer clock source.
Timer starting value = 0001H.
Timer reload value = ABCDH.
Selects Port A Alternate Function control register.
PACTL[0] enables Timer 0 Input Alternate function.
PACTL[1] enables Timer 0 Output Alternate function.
Disables the Timer 0 interrupt.
PS025015-1212
PRELIMINARY
Timers