Z8F1680SH020SG Datasheet, PDF (213/412 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F1680 Series
Product Specification
188
START
SAMPLE/HOLD
BUSY
1.8 µs min
sample period
conversion period
Programmable
settling period
13-clock
convert period
Figure 31. ADC Timing Diagram
14.2.2. ADC Interrupt
The ADC can generate an interrupt request when a conversion is completed. An interrupt
request that is pending when the ADC is disabled is not automatically cleared. See Figure 32.
ADC Clock
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17
BUSY
13 clocks
convert period
Figure 32. ADC Convert Timing
14.2.3. Reference Buffer
The reference buffer, RBUF, supplies the reference voltage for the ADC. When enabled,
the internal voltage reference generator supplies the ADC and this voltage is available on
PS025015-1212
PRELIMINARY
Analog-to-Digital Converter