English
Language : 

Z8F1680SH020SG Datasheet, PDF (143/412 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers
Z8 Encore! XP® F1680 Series
Product Specification
118
9.3.6. Timer 0–2 Status Registers
The Timer 0–2 Status (TxSTAT) indicates PWM capture/compare event occurrence, over-
run errors, noise event occurrence and reload time-out status.
Table 66. Timer 0–2 Status Register (TxSTAT)
Bit
Field
Reset
R/W
Address
7
NEF
0
R/W
6
5
4
3
Reserved PWM1EO PWM0EO RTOEF
0
0
0
0
R/W
R/W
R/W
R/W
F23H, F27H, F2BH
2
1
0
Reserved PWM1EF PWM0EF
0
0
0
R/W
R/W
R/W
Bit
Description
[7]
NEF
Noise Event Flag
This status is applicable only if the Timer Noise Filter is enabled. The NEF bit will be asserted
if digital noise is detected on the Timer input (TxIN) line when the data is being sampled
(center of bit time). If this bit is set, it does not mean that the timer input data is corrupted
(though it can be in extreme cases), just that one or more Noise Filter data samples near the
center of the bit time did not match the average data value.
[6]
Reserved; must be 0.
[5:4]
PWM x Event Overrun
PWMxEO This bit indicates that an overrun error has occurred. An overrun occurs when a new capture/
compare event occurs before the previous PWMxEF bit is cleared. Clearing the associated
PWMxEF bit in the TxSTAT register clears this bit.
0 = No Overrun
1 = Capture/Compare Event Flag Overrun
[3]
RTOEF
Reload Time-Out Event Flag
This flag is set if timer counts up to the reload value and is reset to 0001H. Software can use
this bit to determine if a reload occurred prior to a capture. It can also determine if timer
interrupt is due to a reload event.
0 = No Reload Time-Out event occurred
1 = A Reload Time-Out event occurred
[2]
Reserved; must be 0.
[1:0]
PWM x Event Flag
PWMxEF This bit indicates if a capture/compare event occurred for this PWM channel. Software can use
this bit to determine the PWM channel responsible for generating the timer interrupt. This
event flag is cleared by writing a 1 to the bit. These bits will be set when an event occurs
independent of the setting of the timer interrupt enable bit.
0 = No Capture/Compare Event occurred for this PWM channel
1 = A Capture/Compare Event occurred for this PWM channel
PS025015-1212
PRELIMINARY
Timers