Z8F1680SH020SG Datasheet, PDF (190/412 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F1680 Series
Product Specification
165
12.3.3. LIN-UART Status 0 Register
The LIN-UART Status 0 Register identifies the current LIN-UART operating
configuration and status. Table 85 describes the Status 0 Register for standard UART
mode. Table 86 describes the Status 0 Register for LIN mode.
Table 85. LIN-UART Status 0 Register—Standard UART Mode (U0STAT0 = F41H)
Bit
7
6
5
4
3
2
1
0
Field
RDA
PE
OE
FE
BRKD TDRE
TXE
CTS
Reset
0
0
0
0
0
1
1
X
R/W
R
R
R
R
R
R
R
R
Address
F41H, F49H
Note: R = Read; X = undefined.
Bit
[7]
RDA
[6]
PE
[5]
OE
[4]
FE
[3]
BRKD
Description
Receive Data Available
This bit indicates that the LIN-UART Receive Data Register has received data. Reading the
LIN-UART Receive Data Register clears this bit.
0 = The LIN-UART Receive Data Register is empty.
1 = There is a byte in the LIN-UART Receive Data Register.
Parity Error
This bit indicates that a parity error has occurred. Reading the Receive Data Register clears
this bit.
0 = No parity error occurred.
1 = A parity error occurred.
Overrun Error
This bit indicates that an overrun error has occurred. An overrun occurs when new data is
received and the Receive Data Register is not read. Reading the Receive Data Register clears
this bit.
0 = No overrun error occurred.
1 = An overrun error occurred.
Framing Error
This bit indicates that a framing error (no stop bit following data reception) was detected.
Reading the Receive Data Register clears this bit.
0 = No framing error occurred.
1 = A framing error occurred.
Break Detect
This bit indicates that a break occurred. If the data bits, parity/multiprocessor bit and stop bit(s)
are all zeros then this bit is set to 1. Reading the Receive Data Register clears this bit.
0 = No break occurred.
1 = A break occurred.
PS025015-1212
PRELIMINARY
LIN-UART