Z8F1680SH020SG Datasheet, PDF (69/412 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F1680 Series
Product Specification
44
6.4.
Power Control Register Definitions
The following sections describe the power control registers.
6.4.0.1. Power Control Register 0
Each bit of the following registers disables a peripheral block, either by gating its system
clock input or by removing power from the block.
The default state of the low-power operational amplifier is OFF. To use the low-power
operational amplifier, clear the TRAM bit by turning it ON. Clearing this bit might inter-
fere with normal ADC measurements on ANA0 (the LPO output). This bit enables the
amplifier even in STOP Mode. If the amplifier is not required in STOP Mode, disable it.
Failure to perform this results in STOP Mode currents greater than specified.
Note: This register is only reset during a POR sequence; other system reset events do not affect it.
Table 14. Power Control Register 0 (PWRCTL0)
Bits
Field
Reset
R/W
Address
7
TRAM
1
R/W
6
5
Reserved
0
0
R/W
R/W
4
3
LVD/VBO TEMP
0
0
R/W
R/W
F80H
2
Reserved
0
R/W
1
COMP0
0
R/W
0
COMP1
0
R/W
Bit
Description
[7]
TRAM
Low-Power Operational Amplifier Disable
0 = Low-Power Operational Amplifier is enabled (this applies even in STOP Mode).
1 = Low-Power Operational Amplifier is disabled.
[6:5]
Reserved; must be 0.
[4]
Low-Voltage Detection/Voltage Brown-Out Detector Disable
LVD/VBO 0 = LVD/VBO Enabled.
1 = LVD/VBO Disabled.
The LVD and VBO circuits are enabled or disabled separately to minimize power consumption
in low-power modes. The LVD is controlled by the LVD/VBO bit only in all modes. The VBO is
set by the LVD/VBO bit and the VBO_AO bit of Flash Option bit at Program Memory Address
0000H. Table 15 on page 45 lists the setup condition for LVD and VBO circuits in different
operation modes.
[3]
TEMP
Temperature Sensor Disable
0 = Temperature Sensor Enabled.
1 = Temperature Sensor Disabled.
PS025015-1212
PRELIMINARY
Low-Power Modes