Z8F1680SH020SG Datasheet, PDF (85/412 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F1680 Series
Product Specification
60
7.11.2. Port A–E Control Registers
The Port A–E Control registers set the GPIO port operation. The value in the correspond-
ing Port A–E Address register determines which subregister is read from or written to by a
Port A–E Control Register transaction, see Table 22.
Table 22. Port A–E Control Registers (PxCTL)
Bits
7
6
5
4
3
2
1
0
Field
PCTL
Reset
00H
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Address
FD1H, FD5H, FD9H, FDDH, FE1H
Bit
[7:0]
PCTL
Description
Port Control
The Port Control Register provides access to all subregisters that configure the GPIO Port
operation.
7.11.3. Port A–E Data Direction Subregisters
The Port A–E Data Direction subregister is accessed through the Port A–E Control Regis-
ter by writing 01H to the Port A–E Address register, as indicated in Table 23.
Bits
Field
Reset
R/W
Address
Table 23. Port A–E Data Direction Subregisters (PxDD)
7
6
5
4
3
2
1
0
DD7
DD6
DD5
DD4
DD3
DD2
DD1
DD0
1
1
1
1
1
1
1
1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
If 01H in Port A–E Address Register, accessible through the Port A–E Control Register.
Bit
[7:0]
DD
Description
Data Direction
These bits control the direction of the associated port pin. Port Alternate Function operation
overrides the Data Direction register setting.
0 = Output. Data in the Port A–E Output Data Register is driven onto the port pin.
1 = Input. The port pin is sampled and the value written into the Port A–E Input Data Register.
The output driver is tristated.
PS025015-1212
PRELIMINARY
General-Purpose Input/Output