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Z8F1680SH020SG Datasheet, PDF (277/412 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers
Z8 Encore! XP® F1680 Series
Product Specification
252
Table 126. I2CSTATE_H
State
Encoding
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
State Name
Idle
Slave Start
State Description
I2C bus is idle or I2C controller is disabled.
I2C controller has received a start condition.
Slave Bystander
Address did not match; ignore remainder of transaction.
Slave Wait
Waiting for stop or restart condition after sending a Not
Acknowledge instruction.
Master Stop2
Master completing stop condition (SCL = 1, SDA = 1).
Master Start/Restart MASTER Mode sending start condition (SCL = 1, SDA = 0).
Master Stop1
Master initiating stop condition (SCL = 1, SDA = 0).
Master Wait
Master received a Not Acknowledge instruction, waiting for
software to assert stop or start control bits.
Slave Transmit Data Nine substates, one for each data bit and one for the Acknowledge.
Slave Receive Data Nine substates, one for each data bit and one for the Acknowledge.
Slave Receive Addr1 Slave receiving first address byte (7- and 10-bit addressing) Nine
substates, one for each address bit and one for the Acknowledge.
Slave Receive Addr2 Slave Receiving second address byte (10-bit addressing) nine
substates, one for each address bit and one for the Acknowledge.
Master Transmit Data Nine substates, one for each data bit and one for the Acknowledge.
Master Receive Data Nine substates, one for each data bit and one for the Acknowledge.
Master Transmit Addr1 Master sending first address byte (7- and 10-bit addressing) nine
substates, one for each address bit and one for the Acknowledge.
Master Transmit Addr2 Master sending second address byte (10-bit addressing) nine
substates, one for each address bit and one for the Acknowledge.
Table 127. I2CSTATE_L
State
I2CSTATE_H
0000–0100
Substate
I2CSTATE_L
0000
Substate Name
—
0110–0111 0000
—
0101
0000
0001
Master Start
Master Restart
State Description
There are no substates for these I2CSTATE_H
values.
There are no substates for these I2CSTATE_H
values.
Initiating a new transaction
Master is ending one transaction and starting a
new one without letting the bus go idle.
PS025015-1212
PRELIMINARY
I2C Master/Slave Controller