Z8F1680SH020SG Datasheet, PDF (102/412 Pages) Zilog, Inc. – High-Performance 8-Bit Microcontrollers

Z8 Encore! XP^® F1680 Series
Product Specification
77
Bits
Field
Reset
R/W
Address
7
T2ENL
0
R/W
Table 42. IRQ0 Enable Low Bit Register (IRQ0ENL)
6
T1ENL
0
R/W
5
T0ENL
0
R/W
4
3
U0RENL U0TENL
0
0
R/W
R/W
FC2H
2
I2CENL
0
R/W
1
SPIENL
0
R/W
0
ADCENL
0
R/W
Bit
Description
[7]
Timer 2 Interrupt Request Enable Low Bit
T2ENL
[6]
Timer 1 Interrupt Request Enable Low Bit
T1ENL
[5]
Timer 0 Interrupt Request Enable Low Bit
T0ENL
[4]
UART 0 Receive Interrupt Request Enable Low Bit
U0RENL
[3]
U0TENL
[2]
I2CENL
UART 0 Transmit Interrupt Request Enable Low Bit
I²C Interrupt Request Enable Low Bit
[1]
SPI Interrupt Request Enable Low Bit
SPIENL
[0]
ADC Interrupt Request Enable Low Bit
ADCENL
8.4.5. IRQ1 Enable High and Low Bit Registers
Table 43 lists the priority control for IRQ1. The IRQ1 Enable High and Low Bit registers,
shown in Tables 44 and 45) form a priority-encoded enabling for interrupts in the Interrupt
Request 1 Register. Priority is generated by setting bits in each register.
Table 43. IRQ1 Enable and Priority Encoding
IRQ1ENH[x] IRQ1ENL[x]
Priority
0
0
Disabled
0
1
Level 1
1
0
Level 2
1
1
Level 3
Note: An x indicates the register bits from 0–7.
Description
Disabled
Low
Nominal
High
PS025015-1212
PRELIMINARY
Interrupt Controller